The present disclosure relates to semiconductor circuits and the testing of integrated circuits. More particularly, the present disclosure describes a circuit that operates on a semiconductor circuit during burn-in testing in order to regulate the flow of electrical current through the semiconductor circuit. In many circumstances, semiconductor circuits can experience damage or degradation during burn-in testing. Such damage can include increases in the threshold voltage for an integrated circuit or electromigration in metal lines or at metal interfaces.
Current mode logic (CML) circuits are typically disabled during burn-in test and thus can be particularly sensitive to the degrading effects of bias-temperature induced (BTI) damage. Regulating the flow of electrical current through CML circuits during burn-in testing can preserve their performance after burn-in testing has been completed.